{"id":4216,"date":"2026-03-12T03:21:01","date_gmt":"2026-03-11T19:21:01","guid":{"rendered":"https:\/\/www.chuxin-smt.com\/?p=4216"},"modified":"2026-03-12T03:21:01","modified_gmt":"2026-03-11T19:21:01","slug":"pcb-conveyor-capacity-planning-aoi-spi-reflow-bottlenecks","status":"publish","type":"post","link":"https:\/\/www.chuxin-smt.com\/fr\/pcb-conveyor-capacity-planning-aoi-spi-reflow-bottlenecks\/","title":{"rendered":"PCB conveyor capacity planning around AOI, SPI, and reflow bottlenecks"},"content":{"rendered":"<figure class=\"wp-block-image aligncenter size-large\"><img fetchpriority=\"high\" decoding=\"async\" width=\"1536\" height=\"1024\" src=\"https:\/\/www.chuxin-smt.com\/wp-content\/uploads\/2026\/03\/1773027206-image_1773026047-ilxicdiy.jpeg\" alt=\"Minimalist SMT line diagram highlighting buffers around AOI, SPI, and reflow for PCB conveyor capacity planning.\" class=\"wp-image-4214\" srcset=\"https:\/\/www.chuxin-smt.com\/wp-content\/uploads\/2026\/03\/1773027206-image_1773026047-ilxicdiy.jpeg 1536w, https:\/\/www.chuxin-smt.com\/wp-content\/uploads\/2026\/03\/1773027206-image_1773026047-ilxicdiy-300x200.jpeg 300w, https:\/\/www.chuxin-smt.com\/wp-content\/uploads\/2026\/03\/1773027206-image_1773026047-ilxicdiy-1024x683.jpeg 1024w, https:\/\/www.chuxin-smt.com\/wp-content\/uploads\/2026\/03\/1773027206-image_1773026047-ilxicdiy-768x512.jpeg 768w, https:\/\/www.chuxin-smt.com\/wp-content\/uploads\/2026\/03\/1773027206-image_1773026047-ilxicdiy-18x12.jpeg 18w\" sizes=\"(max-width: 1536px) 100vw, 1536px\" title=\"PCB conveyor capacity planning around AOI, SPI, and reflow bottlenecks - S&amp;M Co.Ltd\" \/><\/figure>\n\n\n\n<p>When inspection variability stacks up, even a well\u2011profiled oven can idle. AOI reinspection loops, SPI stability, and reflow pitch decisions all show up as queues on your conveyors. Here\u2019s a practical, queueing\u2011aware approach to PCB conveyor capacity planning that turns your measured cycle\u2011time variance into the right mix of buffer slots and parallel inspection\u2014anchored by a parameterized automotive ECU example.<\/p>\n\n\n\n<p><em>By<\/em> <strong>[Name], SMT Process Engineer<\/strong> (S&amp;M Co.Ltd \u2014 SMT Equipment &amp; Conveyor Systems Engineering Team)<\/p>\n\n\n\n<p><em>Disclosure:<\/em> This article shares engineering methods and sizing heuristics. Validate assumptions with your own MES\/PLC logs and thermal profiles before committing to CapEx or layout changes.<\/p>\n\n\n\n<h2 class=\"wp-block-heading\">Key takeaways<\/h2>\n\n\n\n<ul class=\"wp-block-list\">\n<li><p>Treat buffers as protection time against variability, not as band\u2011aids for undersized capacity. Use Little\u2019s Law and M\/G\/1 mean\u2011value formulas to translate variability into slot counts.<\/p><\/li><li><p>Never size to average alone. Once stage utilization (\u03c1) passes ~0.80, expected queues grow sharply; add parallel AOI\/SPI before simply extending buffers.<\/p><\/li><li><p>Convert reflow conveyor speed to a target line rate using effective pitch (board length plus process spacing). Then back\u2011calculate the pre\u2011reflow buffer needed to prevent starvation.<\/p><\/li><li><p>Include reinspection\/rework loops in effective AOI service time; even modest false\u2011call fractions can require an extra AOI lane or a bypass path.<\/p><\/li><li><p>For the 160\u00d7120 mm ECU case: a high\u2011throughput plan typically needs 2\u00d7 SPI, 3\u00d7 AOI, and ~10 slots before reflow to protect a 5.7\u20136.0 boards\/min target\u2014tune with your measured CV and false\u2011call rate.<\/p><\/li>\n<\/ul>\n\n\n\n<h2 class=\"wp-block-heading\">Where bottlenecks form in an SMT line<\/h2>\n\n\n\n<p>Variability accumulates where service times are longest and most uncertain. In a typical flow\u2014SPI \u2192 placement \u2192 AOI \u2192 reflow\u2014common queues appear:<\/p>\n\n\n\n<ul class=\"wp-block-list\">\n<li><p>Post\u2011SPI: short lane buffers to absorb printer cycles and transfer jitter.<\/p><\/li><li><p>Post\u2011AOI: accumulation before reflow to cover manual review\/reinspection loops.<\/p><\/li><li><p>Rework path: NG diverter to touch\u2011up and re\u2011AOI; if it shares the main path, it can intermittently block flow.<\/p><\/li>\n<\/ul>\n\n\n\n<p>Think of your line as a set of servers (machines) connected by finite queues (conveyors and buffers). The goal isn\u2019t zero WIP; it\u2019s enough protection time to keep reflow fed at the target rate while respecting WIP and footprint limits.<\/p>\n\n\n\n<p>For a concise framework on translating buffer length to capacity and synchronization practice, see the S&amp;M guide on PCB conveyor system design and synchronization in the article on speed alignment: the concepts in the public primer on <a target=\"_self\" rel=\"follow\" class=\"link\" href=\"https:\/\/www.chuxin-smt.com\/fr\/pcb-conveyor-system-design-ultimate-guide\/\">PCB conveyor system design and buffer sizing<\/a> pair well with this variability\u2011first method, and practical notes in <a target=\"_self\" rel=\"follow\" class=\"link\" href=\"https:\/\/www.chuxin-smt.com\/fr\/adjust-speed-synchronization-pcb-conveyors-efficient-workflow\/\">speed and synchronization for PCB conveyors<\/a> help you verify flow stability on the floor.<\/p>\n\n\n\n<h2 class=\"wp-block-heading\">Measure what matters before sizing buffers<\/h2>\n\n\n\n<p>You\u2019ll get the best results if you size from your own distributions, not catalog averages. Run at least a 4\u20138 hour pilot (\u2265500 boards per product family) and extract from MES\/PLC logs:<\/p>\n\n\n\n<ul class=\"wp-block-list\">\n<li><p>Timestamps: start\/complete at SPI and AOI, transfer events, rework loop times.<\/p><\/li><li><p>Outcomes: OK\/NG with category; flag false calls later cleared as OK.<\/p><\/li><li><p>Reinspection routing: probability of re\u2011AOI after touch\u2011up and its average added time.<\/p><\/li>\n<\/ul>\n\n\n\n<p>From the logs compute means, variances, and coefficients of variation (CV) for service times and inter\u2011departures. You\u2019ll also need an empirical false\u2011reject fraction and a reinspection\/touch\u2011up loop time distribution. If you need a refresher on Little\u2019s Law in manufacturing practice, the Project Production Institute\u2019s overview is a clear, practitioner\u2011oriented reference in <a target=\"_blank\" rel=\"nofollow\" class=\"link\" href=\"https:\/\/projectproduction.org\/journal\/littles-law-a-practical-approach-to-understanding-production-system-performance\/\">Little\u2019s Law, a practical approach<\/a>.<\/p>\n\n\n\n<h2 class=\"wp-block-heading\">The math you need for PCB conveyor capacity planning<\/h2>\n\n\n\n<h3 class=\"wp-block-heading\">Symbols and units (quick reference)<\/h3>\n\n\n\n<figure class=\"wp-block-table\">\n<table class=\"has-fixed-layout\">\n<colgroup><col \/><col \/><col \/><\/colgroup><tbody><tr><th colspan=\"1\" rowspan=\"1\"><p>Symbol<\/p><\/th><th colspan=\"1\" rowspan=\"1\"><p>Meaning<\/p><\/th><th colspan=\"1\" rowspan=\"1\"><p>Typical unit<\/p><\/th><\/tr><tr><td colspan=\"1\" rowspan=\"1\"><p>\u03bb<\/p><\/td><td colspan=\"1\" rowspan=\"1\"><p>Throughput (arrival\/departure rate)<\/p><\/td><td colspan=\"1\" rowspan=\"1\"><p>boards\/s (or boards\/min)<\/p><\/td><\/tr><tr><td colspan=\"1\" rowspan=\"1\"><p>E[S]<\/p><\/td><td colspan=\"1\" rowspan=\"1\"><p>Mean service time at a stage<\/p><\/td><td colspan=\"1\" rowspan=\"1\"><p>s\/board<\/p><\/td><\/tr><tr><td colspan=\"1\" rowspan=\"1\"><p>Var(S)<\/p><\/td><td colspan=\"1\" rowspan=\"1\"><p>Service-time variance<\/p><\/td><td colspan=\"1\" rowspan=\"1\"><p>s\u00b2<\/p><\/td><\/tr><tr><td colspan=\"1\" rowspan=\"1\"><p>CV, c_s<\/p><\/td><td colspan=\"1\" rowspan=\"1\"><p>Coefficient of variation of service time (std\/mean)<\/p><\/td><td colspan=\"1\" rowspan=\"1\"><p>\u2014<\/p><\/td><\/tr><tr><td colspan=\"1\" rowspan=\"1\"><p>c_s\u00b2<\/p><\/td><td colspan=\"1\" rowspan=\"1\"><p>Squared coefficient of variation<\/p><\/td><td colspan=\"1\" rowspan=\"1\"><p>\u2014<\/p><\/td><\/tr><tr><td colspan=\"1\" rowspan=\"1\"><p>\u03c1<\/p><\/td><td colspan=\"1\" rowspan=\"1\"><p>Utilization (\u03bb\u00b7E[S] per lane)<\/p><\/td><td colspan=\"1\" rowspan=\"1\"><p>\u2014<\/p><\/td><\/tr><tr><td colspan=\"1\" rowspan=\"1\"><p>Wq<\/p><\/td><td colspan=\"1\" rowspan=\"1\"><p>Mean waiting time in queue<\/p><\/td><td colspan=\"1\" rowspan=\"1\"><p>s<\/p><\/td><\/tr><tr><td colspan=\"1\" rowspan=\"1\"><p>W<\/p><\/td><td colspan=\"1\" rowspan=\"1\"><p>Mean time in system (Wq + E[S])<\/p><\/td><td colspan=\"1\" rowspan=\"1\"><p>s<\/p><\/td><\/tr><tr><td colspan=\"1\" rowspan=\"1\"><p>Lq<\/p><\/td><td colspan=\"1\" rowspan=\"1\"><p>Mean queue length (\u03bb\u00b7Wq)<\/p><\/td><td colspan=\"1\" rowspan=\"1\"><p>boards<\/p><\/td><\/tr><tr><td colspan=\"1\" rowspan=\"1\"><p>L<\/p><\/td><td colspan=\"1\" rowspan=\"1\"><p>Mean WIP at the stage (\u03bb\u00b7W)<\/p><\/td><td colspan=\"1\" rowspan=\"1\"><p>boards<\/p><\/td><\/tr><tr><td colspan=\"1\" rowspan=\"1\"><p>v<\/p><\/td><td colspan=\"1\" rowspan=\"1\"><p>Conveyor speed (reflow)<\/p><\/td><td colspan=\"1\" rowspan=\"1\"><p>m\/min<\/p><\/td><\/tr><tr><td colspan=\"1\" rowspan=\"1\"><p>Lb<\/p><\/td><td colspan=\"1\" rowspan=\"1\"><p>Board length in the travel direction<\/p><\/td><td colspan=\"1\" rowspan=\"1\"><p>m<\/p><\/td><\/tr><tr><td colspan=\"1\" rowspan=\"1\"><p>f<\/p><\/td><td colspan=\"1\" rowspan=\"1\"><p>Pitch load factor (accounts for added spacing)<\/p><\/td><td colspan=\"1\" rowspan=\"1\"><p>\u2014<\/p><\/td><\/tr><tr><td colspan=\"1\" rowspan=\"1\"><p>Leff<\/p><\/td><td colspan=\"1\" rowspan=\"1\"><p>Effective pitch length per board (Lb\/f)<\/p><\/td><td colspan=\"1\" rowspan=\"1\"><p>m\/board<\/p><\/td><\/tr><\/tbody>\n<\/table>\n<\/figure>\n\n\n\n<p>You don\u2019t need a full course in queueing theory\u2014mean\u2011value formulas get you far.<\/p>\n\n\n\n<ul class=\"wp-block-list\">\n<li><p>Little\u2019s Law: WIP = \u03bb \u00d7 W, where \u03bb is line throughput (boards\/s) and W is average flow time (s).<\/p><\/li><li><p>Reflow rate from conveyor speed: boards\/min \u2248 (speed m\/min \u00d7 60 \u00f7 effective pitch m), where effective pitch is board length divided by a load factor that reflects any added spacing (e.g., load factor 0.85 means 15% spacing). A short application note shows this conversion in context in the <a target=\"_blank\" rel=\"nofollow\" class=\"link\" href=\"https:\/\/texceltechnology.com\/images\/brochures\/Reflow-Soldering.pdf\">Texcel reflow guide PDF<\/a>. Even if a reflow family spec lists \u201c0 spacing\u201d capability (e.g., Heller information indicates minimal spacing can be achieved on some models as shown on the <a target=\"_blank\" rel=\"nofollow\" class=\"link\" href=\"https:\/\/hawkerrichardson.com.au\/product\/heller-industries-1826mk5-series-convection-reflow-soldering-oven\/\">Heller MK5 product info page<\/a>), process stability usually benefits from 10\u201325% extra pitch.<\/p><\/li><li><p>M\/M\/1 baseline to M\/G\/1 mean\u2011value tweak: With arrival rate \u03bb, mean service time E[S], and squared coefficient of variation c_s\u00b2, utilization is \u03c1 = \u03bb\u00b7E[S]. A common mean\u2011value approximation for queue delay is Wq \u2248 (\u03c1\u00b7E[S]\u00b7(1 + c_s\u00b2)) \/ (2\u00b7(1 \u2212 \u03c1)). Total time is W = Wq + E[S]. See an accessible summary in the <a target=\"_blank\" rel=\"nofollow\" class=\"link\" href=\"https:\/\/en.wikipedia.org\/wiki\/Pollaczek%E2%80%93Khinchine_formula\">Pollaczek\u2013Khinchine formula overview<\/a>.<\/p><\/li><li><p>Effective AOI service time with reinspection: If a fraction pR of boards incur an average extra \u0394S (touch\u2011up + re\u2011AOI + transfers), then E[S]_eff \u2248 E[S] + pR\u0394S, and variance increases accordingly. Recalculate \u03c1 and Wq with the updated first and second moments.<\/p><\/li>\n<\/ul>\n\n\n\n<p>Here\u2019s the deal: once \u03c1 creeps above ~0.80 at an inspection stage, Wq grows non\u2011linearly. Buffers can only mask that for a short while; capacity (parallelization) is the durable fix.<\/p>\n\n\n\n<h2 class=\"wp-block-heading\">Worked example for an automotive ECU line<\/h2>\n\n\n\n<p>The inputs below reflect a common automotive ECU scenario. Replace assumptions (CVs, reinspection fraction, spacing) with your measured values.<\/p>\n\n\n\n<p>Inputs and assumptions<\/p>\n\n\n\n<ul class=\"wp-block-list\">\n<li><p>Board: 160 \u00d7 120 mm; panelization 2 \u00d7 1.<\/p><\/li><li><p>SPI: mean service E[S_SPI] = 12 s; assume CV_SPI \u2248 0.3 (stable printer).<\/p><\/li><li><p>AOI: mean service E[S_AOI] = 18 s; assume CV_AOI \u2248 0.5.<\/p><\/li><li><p>Reinspection\/rework at AOI: pR = 8% combined (false calls + true defects); average added loop time \u0394S_loop = 40 s.<\/p><\/li><li><p>Reflow: 9 zones; conveyor speed v = 1.2 m\/min; assume effective pitch load factor f = 0.85 (\u224815% spacing). Use the longer board dimension in flow: Lb = 0.16 m.<\/p><\/li><li><p>KPI priority: maximize throughput\/OTD subject to WIP \u2264 20 boards between SPI \u2192 AOI \u2192 pre\u2011reflow buffer.<\/p><\/li>\n<\/ul>\n\n\n\n<ol class=\"wp-block-list\">\n<li><p>Reflow\u2019s implied line rate<\/p><\/li>\n<\/ol>\n\n\n\n<ul class=\"wp-block-list\">\n<li><p>Effective length per board Leff = Lb \/ f = 0.16 \/ 0.85 \u2248 0.188 m\/board.<\/p><\/li><li><p>Boards\/min at reflow BR = v \/ Leff = 1.2 \/ 0.188 \u2248 6.37 boards\/min \u2192 \u2248 382 bph.<\/p><\/li><li><p>Treat this as an upper bound conditional on thermal profile.<\/p><\/li>\n<\/ul>\n\n\n\n<ol class=\"wp-block-list\" start=\"2\">\n<li><p>SPI capacity and need for parallelization<\/p><\/li>\n<\/ol>\n\n\n\n<ul class=\"wp-block-list\">\n<li><p>Single SPI capacity \u03bc_SPI = 1\/12 s \u2248 5.0 boards\/min. Any target above 5.0 boards\/min makes \u03c1 \u2265 1 (unstable). To pursue ~6 boards\/min, add a second SPI.<\/p><\/li><li><p>With two SPIs and perfect load split, \u03bb_target = 6.0\/min \u2192 \u03bb_each = 3.0\/min = 0.05\/s; \u03c1_each = \u03bb_each\u00d7E[S] = 0.05\u00d712 = 0.60.<\/p><\/li><li><p>Using M\/G\/1 mean\u2011value with c_s^2 = 0.09: Wq \u2248 [0.60\u00d712\u00d71.09]\/[2\u00d70.40] \u2248 9.8 s; W \u2248 21.8 s; L_each \u2248 \u03bb_each\u00d7W \u2248 0.05\u00d721.8 \u2248 1.09 boards. Across both lanes, SPI stage WIP \u2248 2.2 boards.<\/p><\/li>\n<\/ul>\n\n\n\n<ol class=\"wp-block-list\" start=\"3\">\n<li><p>AOI effective demand with reinspection<\/p><\/li>\n<\/ol>\n\n\n\n<ul class=\"wp-block-list\">\n<li><p>Effective mean: E[S]_eff \u2248 18 + 0.08\u00d740 = 21.2 s.<\/p><\/li><li><p>Conservative variance uplift: if base CV\u22480.5, Var_base=(0.5\u00d718)^2=81 s\u00b2; add loop term pR\u0394S\u00b2\u22480.08\u00d71600=128 s\u00b2 \u2192 Var_eff\u2248209 s\u00b2 \u2192 c_s^2\u2248209\/(21.2)^2\u22480.465.<\/p><\/li><li><p>Single AOI capacity \u03bc\u22481\/21.2 s\u22482.83\/min. To feed 6.0\/min, parallelization is required. With two AOIs: \u03bb_each=3.0\/min=0.05\/s\u2192 \u03c1\u22481.06 (not feasible). With three AOIs: \u03bb_each=2.0\/min=0.0333\/s\u2192 \u03c1\u22480.71.<\/p><\/li><li><p>Wq_each \u2248 [0.71\u00d721.2\u00d7(1+0.465)]\/[2\u00d70.29] \u2248 38 s; W\u224859 s. L_each\u2248\u03bb_each\u00d7W\u22480.0333\u00d759\u22481.97 boards \u2192 AOI stage WIP across 3 lanes \u2248 5.9 boards.<\/p><\/li>\n<\/ul>\n\n\n\n<ol class=\"wp-block-list\" start=\"4\">\n<li><p>Pre\u2011reflow accumulation buffer sizing<\/p><\/li>\n<\/ol>\n\n\n\n<ul class=\"wp-block-list\">\n<li><p>Intent: protect reflow from AOI variability and manual reviews.<\/p><\/li><li><p>Protection time T_protect should at least cover a representative AOI queue delay. Choose 75 s for a high\u2011throughput target.<\/p><\/li><li><p>At \u03bb = 6.0\/min = 0.10\/s: expected slots \u2248 \u03bb\u00d7T_protect \u2248 0.10\u00d775 = 7.5 \u2192 round to 8.<\/p><\/li><li><p>Add 20\u201340% safety for transfer jitter and diverter actions \u2192 10\u201312 slots. Use your floor constraints to pick 10 or 12.<\/p><\/li>\n<\/ul>\n\n\n\n<ol class=\"wp-block-list\" start=\"5\">\n<li><p>WIP constraint check (\u2264 20 boards between SPI\u2192AOI\u2192pre\u2011reflow)<\/p><\/li>\n<\/ol>\n\n\n\n<ul class=\"wp-block-list\">\n<li><p>SPI \u2248 2.2; AOI \u2248 5.9; pre\u2011reflow buffer 10\u201312; transfers 1\u20132.<\/p><\/li><li><p>Sum at 10 slots: 2.2 + 5.9 + 10 + 1.0\u20132.0 \u2248 19.1\u201320.1. If you must stay under 20, start with 10 slots and trim AOI variability (better recipes, review routing) or run slightly lower at 5.7\u20135.8 boards\/min until AOI tuning lowers pR.<\/p><\/li>\n<\/ul>\n\n\n\n<p>Micro product example (neutral) If your calculation calls for ~10 slots before reflow and your board is 160 mm long, a compact inspection\/accumulation conveyor with adjustable width and segment\u2011level control is a practical choice. For instance, the public spec of the <a target=\"_self\" rel=\"follow\" class=\"link\" href=\"https:\/\/www.chuxin-smt.com\/fr\/products\/conveyor-inspection-conveyor\/\">inspection conveyor product<\/a> lists configurable lengths that can be combined to achieve the 10\u201312 slot requirement at your effective pitch; match module length to slot count using Leff and confirm speed synchronization with your PLC. This is an illustrative mapping\u2014validate final dimensions and controls against your process window.<\/p>\n\n\n\n<p>Sensitivity notes you should test on your floor<\/p>\n\n\n\n<ul class=\"wp-block-list\">\n<li><p>Lowering AOI pR from 8% to 5% cuts E[S]_eff by 1.2 s and meaningfully reduces Wq; you may avoid a third AOI at modest line rates.<\/p><\/li><li><p>If profiling forces reflow pitch to f = 0.75 (25% spacing), BR drops to \u22485.63\/min; your bottleneck may shift and the buffer can be shortened accordingly.<\/p><\/li>\n<\/ul>\n\n\n\n<p>For a short, accessible summary of why expected queues rise with both utilization and variance, the <a target=\"_blank\" rel=\"nofollow\" class=\"link\" href=\"https:\/\/en.wikipedia.org\/wiki\/Pollaczek%E2%80%93Khinchine_formula\">Pollaczek\u2013Khinchine overview<\/a> is a useful companion reference.<\/p>\n\n\n\n<h2 class=\"wp-block-heading\">Decision matrix for buffers versus parallel inspection<\/h2>\n\n\n\n<p>The table below maps common situations to actions with the primary KPI here\u2014throughput\/OTD\u2014front and center.<\/p>\n\n\n\n<figure class=\"wp-block-table\">\n<table class=\"has-fixed-layout\">\n<colgroup><col \/><col \/><col \/><col \/><\/colgroup><tbody><tr><th colspan=\"1\" rowspan=\"1\"><p>Situation<\/p><\/th><th colspan=\"1\" rowspan=\"1\"><p>Primary KPI impact<\/p><\/th><th colspan=\"1\" rowspan=\"1\"><p>Preferred action<\/p><\/th><th colspan=\"1\" rowspan=\"1\"><p>Rationale<\/p><\/th><\/tr><tr><td colspan=\"1\" rowspan=\"1\"><p>AOI \u03c1 \u2265 0.80 and rising Wq; false\u2011calls &gt;5%<\/p><\/td><td colspan=\"1\" rowspan=\"1\"><p>Throughput at risk<\/p><\/td><td colspan=\"1\" rowspan=\"1\"><p>Add AOI lane; tune recipes<\/p><\/td><td colspan=\"1\" rowspan=\"1\"><p>Capacity neutralizes non\u2011linear queue growth; recipe tuning lowers E[S]_eff<\/p><\/td><\/tr><tr><td colspan=\"1\" rowspan=\"1\"><p>SPI \u03c1 \u2265 0.80 but AOI stable<\/p><\/td><td colspan=\"1\" rowspan=\"1\"><p>Throughput at risk<\/p><\/td><td colspan=\"1\" rowspan=\"1\"><p>Add SPI lane<\/p><\/td><td colspan=\"1\" rowspan=\"1\"><p>Printers cap rate; buffers can\u2019t fix unstable \u03c1<\/p><\/td><\/tr><tr><td colspan=\"1\" rowspan=\"1\"><p>Short AOI micro\u2011stops starve reflow<\/p><\/td><td colspan=\"1\" rowspan=\"1\"><p>OTD slips from idling<\/p><\/td><td colspan=\"1\" rowspan=\"1\"><p>Add 60\u201390 s pre\u2011reflow buffer<\/p><\/td><td colspan=\"1\" rowspan=\"1\"><p>Converts bursts into steady feed via T_protect<\/p><\/td><\/tr><tr><td colspan=\"1\" rowspan=\"1\"><p>Rework loop blocks mainline<\/p><\/td><td colspan=\"1\" rowspan=\"1\"><p>Local blocking; WIP spikes<\/p><\/td><td colspan=\"1\" rowspan=\"1\"><p>Add NG diverter and short dedicated rework buffer<\/p><\/td><td colspan=\"1\" rowspan=\"1\"><p>Decouples rework from main conveyor<\/p><\/td><\/tr><tr><td colspan=\"1\" rowspan=\"1\"><p>High\u2011mix changeovers<\/p><\/td><td colspan=\"1\" rowspan=\"1\"><p>Both throughput and WIP<\/p><\/td><td colspan=\"1\" rowspan=\"1\"><p>Use bypass\/dual\u2011track with smart scheduling<\/p><\/td><td colspan=\"1\" rowspan=\"1\"><p>Keeps hot product flowing while staging next job<\/p><\/td><\/tr><\/tbody>\n<\/table>\n<\/figure>\n\n\n\n<h2 class=\"wp-block-heading\">Spreadsheet steps and a tiny algorithm to reuse<\/h2>\n\n\n\n<p>You can implement the method in a simple worksheet and reuse it across products.<\/p>\n\n\n\n<p>Cell formulas (units in seconds unless noted)<\/p>\n\n\n\n<ul class=\"wp-block-list\">\n<li><p>Reflow pitch: Leff = Lb \/ f<\/p><\/li><li><p>Reflow rate: BR (boards\/min) = v \/ Leff<\/p><\/li><li><p>Effective AOI mean: ESe = ES + pR\u00d7\u0394S<\/p><\/li><li><p>Effective AOI variance (conservative): Var_e \u2248 Var_base + pR\u00d7(\u0394S)^2<\/p><\/li><li><p>AOI squared CV: c_s^2 = Var_e \/ (ESe)^2<\/p><\/li><li><p>Utilization per lane: \u03c1 = (\u03bb \/ nlanes) \u00d7 ESe<\/p><\/li><li><p>Queue delay per lane: Wq \u2248 [\u03c1\u00d7ESe\u00d7(1 + c_s^2)] \/ [2\u00d7(1 \u2212 \u03c1)]<\/p><\/li><li><p>Pre\u2011reflow slots: Slots \u2248 \u03bb\u00d7T_protect \u00d7 (1 + safety_margin)<\/p><\/li>\n<\/ul>\n\n\n\n<p>Pseudo\u2011algorithm<\/p>\n\n\n\n<pre class=\"wp-block-code\">\n<code>Given target \u03bb, board length Lb, spacing factor f, SPI and AOI service stats, and WIP cap:\n1) Compute Leff = Lb \/ f and BR = v \/ Leff.\n2) Set \u03bb_target = min(BR, business target). If \u03bb_target &gt; SPI capacity, set n_SPI so \u03c1_SPI \u2264 0.75.\n3) Build AOI effective service stats with pR and \u0394S; choose n_AOI so \u03c1_AOI \u2264 0.75\u20130.80.\n4) Pick T_protect (60\u201390 s typical) and compute pre\u2011reflow Slots = ceil(\u03bb_target\u00d7T_protect\u00d7(1+safety)).\n5) Sum WIP across SPI, AOI, transfers, and buffer; if &gt; cap, iterate: reduce pR via recipe, tweak \u03bb, or adjust Slots.\n6) Validate on the floor; log Wq and starvation frequency; update parameters.\n<\/code><\/pre>\n\n\n\n<h2 class=\"wp-block-heading\">Checklist to validate on the floor<\/h2>\n\n\n\n<ul class=\"wp-block-list\">\n<li><p>Run a \u22654\u2011hour pilot on the target product family; collect \u2265500 boards with start\/stop timestamps at SPI\/AOI and rework loop events.<\/p><\/li><li><p>Compute E[S], Var(S), CV for SPI and AOI; estimate pR and average \u0394S from logs.<\/p><\/li><li><p>Confirm effective reflow pitch (tachometer + profile) and absence of starvation\/blocking in the logs.<\/p><\/li><li><p>Size n_SPI and n_AOI so \u03c1 \u2264 0.80; then set pre\u2011reflow buffer to 60\u201390 s protection with a 20\u201340% safety margin.<\/p><\/li><li><p>Re\u2011measure after recipe tuning and adjust Slots and nlanes if pR or CV changes.<\/p><\/li>\n<\/ul>\n\n\n\n<h2 class=\"wp-block-heading\">Next steps and further reading<\/h2>\n\n\n\n<p>If you want a deeper dive into slot\u2011length mapping and module selection, the public primer on <a target=\"_self\" rel=\"follow\" class=\"link\" href=\"https:\/\/www.chuxin-smt.com\/fr\/pcb-conveyor-system-design-ultimate-guide\/\">PCB conveyor system design and buffer sizing<\/a> is a good companion to this method. For AOI programming practices that aim to cut false calls, vendor thought\u2011leadership like Koh Young\u2019s note on <a target=\"_blank\" rel=\"nofollow\" class=\"link\" href=\"https:\/\/kohyoung.com\/en\/news\/ai-powered-aoi-the-key-to-higher-yields-and-smarter-factories\/\">AI\u2011assisted AOI and yield improvements<\/a> offers context; validate results with your own logs. If you need neutral help translating your calculated slot counts into specific module lengths and controls, S&amp;M can provide conveyor specifications and integration guidance.<\/p>\n\n\n\n<p>SEO note for implementers: this queueing\u2011first approach to PCB conveyor capacity planning is most reliable when grounded in your measured distributions; avoid copying catalog UPH without variance and reinspection data.<\/p>","protected":false},"excerpt":{"rendered":"<p>Practical, data-driven guide for SMT engineers on PCB conveyor capacity planning around AOI, SPI, and reflow bottlenecks\u2014includes queueing models, a worked ECU example, and concrete sizing rules.<\/p>","protected":false},"author":3,"featured_media":4215,"comment_status":"","ping_status":"","sticky":false,"template":"","format":"standard","meta":{"_acf_changed":false,"site-sidebar-layout":"default","site-content-layout":"","ast-site-content-layout":"default","site-content-style":"default","site-sidebar-style":"default","ast-global-header-display":"","ast-banner-title-visibility":"","ast-main-header-display":"","ast-hfb-above-header-display":"","ast-hfb-below-header-display":"","ast-hfb-mobile-header-display":"","site-post-title":"","ast-breadcrumbs-content":"","ast-featured-img":"","footer-sml-layout":"","theme-transparent-header-meta":"","adv-header-id-meta":"","stick-header-meta":"","header-above-stick-meta":"","header-main-stick-meta":"","header-below-stick-meta":"","astra-migrate-meta-layouts":"default","ast-page-background-enabled":"default","ast-page-background-meta":{"desktop":{"background-color":"var(--ast-global-color-4)","background-image":"","background-repeat":"repeat","background-position":"center center","background-size":"auto","background-attachment":"scroll","background-type":"","background-media":"","overlay-type":"","overlay-color":"","overlay-opacity":"","overlay-gradient":""},"tablet":{"background-color":"","background-image":"","background-repeat":"repeat","background-position":"center center","background-size":"auto","background-attachment":"scroll","background-type":"","background-media":"","overlay-type":"","overlay-color":"","overlay-opacity":"","overlay-gradient":""},"mobile":{"background-color":"","background-image":"","background-repeat":"repeat","background-position":"center center","background-size":"auto","background-attachment":"scroll","background-type":"","background-media":"","overlay-type":"","overlay-color":"","overlay-opacity":"","overlay-gradient":""}},"ast-content-background-meta":{"desktop":{"background-color":"var(--ast-global-color-5)","background-image":"","background-repeat":"repeat","background-position":"center center","background-size":"auto","background-attachment":"scroll","background-type":"","background-media":"","overlay-type":"","overlay-color":"","overlay-opacity":"","overlay-gradient":""},"tablet":{"background-color":"var(--ast-global-color-5)","background-image":"","background-repeat":"repeat","background-position":"center center","background-size":"auto","background-attachment":"scroll","background-type":"","background-media":"","overlay-type":"","overlay-color":"","overlay-opacity":"","overlay-gradient":""},"mobile":{"background-color":"var(--ast-global-color-5)","background-image":"","background-repeat":"repeat","background-position":"center center","background-size":"auto","background-attachment":"scroll","background-type":"","background-media":"","overlay-type":"","overlay-color":"","overlay-opacity":"","overlay-gradient":""}}},"categories":[53,1],"tags":[],"class_list":["post-4216","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-enterprise-information","category-company-news"],"acf":[],"_links":{"self":[{"href":"https:\/\/www.chuxin-smt.com\/fr\/wp-json\/wp\/v2\/posts\/4216","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/www.chuxin-smt.com\/fr\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/www.chuxin-smt.com\/fr\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/www.chuxin-smt.com\/fr\/wp-json\/wp\/v2\/users\/3"}],"replies":[{"embeddable":true,"href":"https:\/\/www.chuxin-smt.com\/fr\/wp-json\/wp\/v2\/comments?post=4216"}],"version-history":[{"count":0,"href":"https:\/\/www.chuxin-smt.com\/fr\/wp-json\/wp\/v2\/posts\/4216\/revisions"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/www.chuxin-smt.com\/fr\/wp-json\/wp\/v2\/media\/4215"}],"wp:attachment":[{"href":"https:\/\/www.chuxin-smt.com\/fr\/wp-json\/wp\/v2\/media?parent=4216"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/www.chuxin-smt.com\/fr\/wp-json\/wp\/v2\/categories?post=4216"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/www.chuxin-smt.com\/fr\/wp-json\/wp\/v2\/tags?post=4216"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}